Abstract
Edge detection is an essential processused to determine the object margins in most of the computer vision applications. Sobel edge detection algorithm, which is a simple method of edge detection, detects edges of various objects in an image. Real-time image applications need to be processed with large pixel data for a given time interval. So, Most of the VLSI architectures proposed for implementing sobeledge detection systems use FPGA, due to the parallel computing and reconfigurable feature. So, this paper introduces various VLSI architectures of sobel edge detection and comparesthe parameters like execution time, power dissipation with respect to similar input image size, different clock frequencies.
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