Abstract
AbstractThis paper comprises a broad survey of multistage interconnection networks (MINs), which are incorporated into the underlying fabric of fast packet switches for use in broadband ATM networks. A general classification of MINs based on network functionality and blocking characteristics in the context of fast packet switches is presented in order to emphasize the fundamental principles which differentiate the network architectures. For each class of network, important theoretical results are given and the underlying design principles are explained with the best known explicit examples. Special emphasis is given to the implementation complexities and control strategies of individual approaches.
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