Abstract
This article presents an overview of current 16- and 32-bit microprocessor architectures that support memory management. The authors define the basic requirements for a processor to support memory management and introduce hierarchically organized memory. They describe several address translation schemes, such as paging, segmentation, and combined paging/segmentation and discuss their implementation in current microprocessors. They give special emphasis to the application of associative cache memory, and analyze and compare single-level and multi-level address mapping schemes. Futhermore, the article discusses the capabilities of current microprocessors to support virtual memory, which includes abilities to recognize an address fault, to abort the execution of the current instruction and save necessary information, and to restore the saved state and resume normal processing. The authors evaluate two methods to restart the interrupted instruction, instruction restart and instruction continuation, and discuss their implementation in current microprocessors. They also discuss protection and security issues, and evaluate two protection schemes, hierarchical and nonhierarchical.
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