Abstract
We are developing an all-digital, high-speed, low-power superconductive multi-hit time digitizer based on a RSFQ time-to-digital converter (TDC). The advantages of this TDC, as compared to semiconductor TDCs, include excellent single, as well as multi-hit time resolution and extremely low power dissipation. Each TDC channel consists of a 14-bit superconductive counter based on toggle flip-flops with destructive readouts, a 9-word shift register-based FIFO memory, and a parallel-to-serial converter with output driver. To facilitate external control and data interfacing of the TDC, we have been developing a VXI-bus interface. Its low-power dissipation allows the TDC to be directly integrated with cooled front-end detectors, including optical detectors, eliminating cable bandwidth limitations.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.