A Sub-nW 93% Peak Efficiency Buck Converter With Wide Dynamic Range, Fast DVFS, and Asynchronous Load-Transient Control

Abstract

This article presents a highly efficient buck converter with sub-nW quiescent power and wide dynamic range for ultra-low-power (ULP) Internet-of-Things (IoT) systems-on-chip (SoCs). To optimize the SoC power consumption and performance, this buck converter supports fast dynamic voltage and frequency scaling (DVFS) and fast load-transient response (FLTR) using an asynchronous control scheme. To achieve robust and high-efficiency power delivery over process, voltage, and temperature variations, an adaptive deadtime controller (ADTC) is proposed with minimized area and power overhead. The power stage and gate drivers are optimized by a length split technique and a strong-up weak-down (SuWd) scheme to achieve low quiescent power. In addition, the buck converter is fully self-contained with a bias generator (BG), clock, and power-on-reset (PoR) integrated on-chip. Fabricated in 65-nm CMOS, measurement results show that the buck converter achieves 802-pW quiescent power and 93% peak efficiency at 1.5-V input voltage. The measured dynamic range is from 0.5 to 2.75 mW, which is over six orders of magnitude. The measured voltage droop is 56 mV for a 45-nA-to-1-mA load current step and DVFS up- and down-tracking takes 10.57 and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$19.81~\mu \text{s}$ </tex-math></inline-formula> for an 88- and 92-mV reference step, respectively. This sub-nW buck converter integrates fast DVFS and FLTR features with a wide dynamic range making it suitable for ULP IoT applications.