A Sub-1 ppm/°C dual-reference small-area bandgap reference comprising an enhanceable piecewise curvature compensation circuit

Abstract

This paper presents a low-temperature coefficient (TC) dual-reference CMOS bandgap reference (BGR) for high-performance systems working under a wide temperature range. It consists of a correction approach to eliminate the high-order inaccuracy, in which an enhanceable curvature compensation circuit is adopted to extend the operating temperature range and generate reference voltages with sub-1 ppm/°C TC. In addition, a voltage level shifter (VLS) is used to generate the latter compensated reference voltage but no need for an additional compensation circuit. The proposed BGR designed in a 0.18-µm CMOS process has a simulated TC of 0.75 ppm/°C and 0.28 ppm/°C for the first and second reference outputs, respectively, over a wide temperature range of −50 °C to 130 °C. The proposed BGR occupies a 0.0079-mm2 silicon area. The overheads make the BGR appropriate to provide reference voltages in diverse chips with high-precision systems.