A study on the thermomechanical behavior of semiconductor chips on thin silicon substrate

Abstract

This study is concerned with the deformation or warping behavior of thin layered semiconductor structure comprising a silicon substrate, a pattern layer and a polyimide coating layer with its thickness varying from 100um to 50 um. In contrast with the conventional thick semiconductor structure, today’s semiconductor structure is increasingly thin and therefore the warping is extremely conspicuous, being among the major concerns in the structural design of a chip. In the view of thermomechanical analysis of an extremely thin layer structure considered in the present paper, a few parameters on the deformation should be taken into consideration such as the pattern layer and intrinsic stress. To account for the effect of the pattern layer, we make a well educated guess for the mechanical properties, employing the test results and the CBA (Composite Beam Analysis) theory. In addition, we take into consideration the effect of the intrinsic stress due to moisture absorption on deformation. We show that the chip warpage is accurately predicted when all these are properly considered. Furthermore, we have found that the local instability or wrinkling, associated with the nonuniformity or the inhomogeneity in material properties and bonding quality between any two neighboring layers, appears as one important mode of energy relaxation in addition to the overall warpage when the chip thickness becomes very small.