Abstract
Abstract: In order to reduce fault location estimation error, this paper deals with an enhanced fault location technique based on the improved DC offset filter. In addition, this paper presents the complete design of smart digital fault locator using GPS time-synchronized phasor. The smart fault location algorithm uses the transmitted relaying signals from the two-end terminal. The smart fault locator hardware consists of a main processor unit, analog to digital processor unit, signal interface unit, and power module. Various types of real-time test using COMTRADE format of Omicron apparatus are included.
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