Abstract
Novel device structures of 200 Å and 130 Å gate oxide have been designed and used to study the sensitivity of MOS devices to degradation during high current implantation versus structural considerations. The design of these devices is presented and their properties discussed in detail. These novel structures along with polysilicon layers on oxide and bare and screen oxide wafers are employed to investigate charge buildup under various beam current (density), dose and wafer biasing conditions. All the structures are used to study the influence of the electron flood gun on reducing device charge buildup. The effects of various wafer clamping arrangements are studied. The electron flood gun operation and currents are discussed. Data obtained with these test vehicles on charge buildup under various implantation conditions and a summary of observations for key test structures are presented.
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