Abstract
Charge pumping (CP) technology is a useful tool to measure interface traps in devices such as planar MOSFETs and SOI FinFETs but scarcely used in bulk FinFETs. In this paper, high-low frequency (HLF) CP was employed to test the interface traps in bulk FinFETs for the first time. Bulk FinFETs fabricated with different process parameters, such as interface areas, post deposition annealing (PDA) temperatures, interface layer (IL) deposition and high-κ(HK) layer deposition conditions, were charcaterized systematically. It is followed by the evaluation of gate leakage and breakdown voltage to demonstrate the validity of HLF CP test. Achieved results indicate that HLF CP is an accurate method to evaluate interface traps in bulk FinFETs. It is also found that the gate leakage is affected by the high frequency in tests. And frequencies higher than 2MHz in tests can lead to inaccurate results in as-fabricated bulk FinFETs.
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