Abstract

The paper is about hardware implementations of the CRC computation algorithms. Combinational circuits of CRC8 and CRC32 computation devices, which can be embedded in satellites for error checking in configuration memory and data transmission module, were considered. The conclusion about the advantages of matrix-driven algorithm hardware implementation, which are a simple diagram is built using only logic «exclusive OR» was done. The examples of CRC8 and CRC32 devices working were presented according to parametric model with different input data.

Highlights

  • For the aerospace and defense electronics, telecommunications and control systems are very important to be able to make sure that the configuration data in the Field-Programmable Gate Arrays (FPGAs) on board does not contain any errors

  • CRC computation is produced without storage elements using only logic «exclusive OR», which is a feature of matrix algorithm hardware implementation

  • The paper discussed hardware implementations of CRC computation algorithms, such as a tabledriven which is widely used in data transmission protocols, a matrix-driven, which allows significantly simplify combinational circuit of CRC computing device

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Summary

Introduction

For the aerospace and defense electronics, telecommunications and control systems are very important to be able to make sure that the configuration data in the Field-Programmable Gate Arrays (FPGAs) on board does not contain any errors. Ionizing radiation in space can cause unwanted switching of memory cells in the FPGA, which contains the configuration memory, user memory and registers. Such switching may cause equipment failure, which is critical in outer space. In the papers [4, 5] software implementation of table-driven and matrix-driven algorithms were described. The advantages of matrix-driven algorithm implementation, which are concluded in the low requirements of memory, were showed. The implementation allows to simplify device circuit and to apply features of matrix-driven algorithm in hardware implementation

Hardware implementations of the CRC computation algorithms
Testing of the hardware implementations
Conclusion
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