A Stochastic Computing Scheme of Embedding Random Bit Generation and Processing in Computational Random Access Memory (SC-CRAM)

Abstract

Stochastic computing (SC) has emerged as a promising solution for performing complex functions on large amounts of data to meet future computing demands. However, the hardware needed to generate random bit-streams using conventional CMOS based technologies drastically increases the area and delay cost. Area costs can be reduced using spintronics based RNGs, however, this will not alleviate the delay costs since stochastic bit generation is still performed separately from the computation. In this paper, we present an SC method of embedding stochastic bit generation and processing in a computational random access memory array, which we refer to as SC-CRAM. We demonstrate that SC-CRAM is a resilient and low cost method for image processing, Bayesian inference systems, and Bayesian belief networks.