A stereo audio chip using approximate processing for decimation and interpolation filters

Abstract

A stereo audio chip uses approximate processing techniques in the digital decimation and interpolation filters to reduce its active power dissipation. One pair of analog-to-digital (A/D) converters and one pair of digital-to-analog (D/A) converters have been integrated in a die area of 10.22 mm/sup 2/ in a 0.5 /spl mu/m CMOS technology. The total power dissipation of these converters without power management is 200 mW when operated from a 5-V power supply. When the signal is fully active, power reductions of 36% for decimation and 17% for interpolation over fixed-order filters are demonstrated. When the signal is 40 dB below overload, power reductions of 67% for decimation and 44% for interpolation over fixed-order filters are observed. The power reductions are 83.1% for A/D converters, and 82.7% for D/A converters, when the signal is silent for a period of time.