Abstract

Recently, it is indispensable to test in transition fault model due to timing defects increase along with complication and high speed of VLSI. However, the transition fault coverage tends to be lower than the stuck-at fault coverage due to untestable faults caused by the circuit structure. Low transition fault coverage may not be able to detect potential timing defects. Therefore, it is important to design-for-testability (DFT) to improve transition fault coverage. In this paper, we show that transition fault coverages depend on state assignment to a controller in RTL netlists. We propose a QDT value which is an evaluation index on transition fault coverage for state assignment. Experimental results show that state assignment with high evaluation index has high transition fault coverages.

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