A standard cell-based leakage power analysis attack countermeasure using symmetric dual-rail logic

Abstract

Leakage power analysis (LPA) attacks aim at finding the secret key of a cryptographic device from measurements of its static (leakage) power. This novel power analysis attacks take advantage of the dependence of the leakage power of complementary metal oxide semiconductor (CMOS) integrated circuits on the data they process. This paper proposes symmetric dual-rail logic (SDRL), a standard cell LPA attack countermeasure that theoretically resists the LPA attacks. The technique combines standard building blocks to make new compound standard cells, which are close to constant leakage power consumption. Experiment results show SDRL is a promising approach to implement an LPA-resistant crypto processor.