A standard cell approach for MagnetoElastic NML circuits

Abstract

Among emerging technologies Quantum dot Cellular Automata (QCA) plays a fundamental role. Its magnetic version, normally called NanoMagnet Logic (NML), is particularly interesting thanks to the ability to work at room temperature and to mix logic and memory in the same device. Magnetic circuits have also a potential very low power consumption. Unfortunately classic NML circuits are normally driven (clocked) with a current generating a clocked magnetic field, nullifying the possibility to actually obtain low power circuits. We have recently developed a technology-friendly solution, the MagnetoElastic NML (ME-NML), where magnetic circuits are driven through an electric field, and not with a current, drastically reducing the power consumption. In this paper we start to explore the architectural consequences of this new magnetic technology. The analysis is performed using as a benchmark a Galois multiplier, a systolic architecture particularly suited for QCA and NML technologies. The layout is precisely described and the resulting circuit is modeled and simulated using VHDL language. The obtained results are remarkable. The circuit area is reduced by 4 times compared to classic NML approach. This, coupled with the intrinsic lower power consumption due to different clock, leads to a 50 times reduction of power absorption. Moreover the particular structure of magnetoelastic NML allows to define a library of standard cells that can be easily used by designers and automatic layout tools to design circuits, greatly improving future research in this field.