Abstract
Companding circuits are very useful blocks for realizing low-voltage, high-frequency analog systems. They are implemented using the translinear principle and the quadratic/exponential I-V characteristic of MOS/BJT transistor. In this paper, a Square-Root Domain differentiator is proposed. It is constructed from an appropriate input stage that converts the input current into a compressed voltage at a capacitor's node, and simultaneously senses the capacitor's current. The overall configuration of the differentiator also includes a current geometric-mean circuit and a multiplier, both based on a translinear loop. An attractive characteristic of the proposed circuits is their immunity to body effect. HSPICE simulation results were used for evaluating the behaviour of the differentiator.
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