A Split Gate Power FINFET With Improved ON-Resistance and Switching Performance

Abstract

A split gate power FINFET (SG-FINFET) with reduced ON-resistance and improved switching performance is proposed and its mechanism is investigated by simulations. It is characterized by a fin gate (FG) and split gate: the FG surrounds the p-well region from three dimensions; the split gate tied to the source is embedded beside the drift region and isolated with slant oxide. First, the FG enlarges the channel width and modulates the current distribution, which leads to a low specific ON-resistance ( $R_{\mathrm {\mathrm{\scriptscriptstyle ON},sp}})$ and improved transconductance ( $g_{m})$ . Second, the split gate acts as a source field plate to assist in depleting the drift region, which increases the drift doping concentration ( $N_{d})$ and further reduces $R_{\mathrm {\mathrm{\scriptscriptstyle ON},sp}}$ . Third, the split gate reduces the gate–drain capacitance ( $C_{\mathrm {GD}})$ and switching power dissipation. Compared with the conventional LDMOS and superjunction LDMOS, the SG-FINFET decreases $R_{\mathrm {\mathrm{\scriptscriptstyle ON},sp}}$ by 60% and 47% at the same 80 V class breakdown voltage. The SG-FINFET also exhibits 55% reduction in the gate–drain charge $Q_{\mathrm {GD}}$ in comparison with the FG LDMOS (without the split gate).