Abstract
Neuromorphic engineering aims to implement a brain-inspired computing architecture as an alternative paradigm to the von Neumann processor. In this work, we propose a hardware-based spiking neural network (SNN) architecture for unsupervised learning with spike-timing-dependent plasticity (STDP) synapse array using flash memory synaptic array. This novel architecture includes a global self-controller to make each neuron in a single neuron layer operate systematically, which can be also an excellent benefit in terms of area required for system configuration. Therefore, the proposal of this architecture configuration is significant in terms of suggesting a methodology for extending a single neuron into a network. We perform circuit simulation using HSPICE to verify systematic operations of multiple neuron system such as feed-forward and -back pulses generation, a refractory period, a lateral inhibition, and a homeostasis. Various operation in the proposed architecture are designed based on MATLAB simulation result of 28 × 28 MNIST handwritten digit learning and recognition in the SNN having an array of thin-film transistor (TFT)-type NOR flash memory synaptic devices. The results of circuit simulation reflect the specifications required for the STDP operation using the long-term potentiation (LTP) and long-term depression (LTD) characteristics of the proposed synaptic device. The pulse scheme required for STDP in this paper is shown to be suitable for unsupervised learning with flash memory synaptic device.
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