A software tool for the development of graphic-model-based hardware descriptions using VHDL

Abstract

With the purpose of making the process of hardware design quicker and easier, a number of investigations have been conducted concerning the automatic generation of VHDL descriptions based on graphic models. In this document, a software tool that generates VHDL descriptions based on either ASM diagrams or components diagrams will be presented. The characteristics of this tool allow a VHDL description already created to be reused like a new component. Additionally, the information contained in an ASM diagram can be reused as part of new ASM diagrams. The tool is used to generate the VHDL description of 15 well-known circuits from both their component diagrams and their ASM diagrams, obtaining an equivalent description in 53% of the cases and approximate descriptions in the remaining cases.