A Software Defined Radio Receiver Architecture Based on Cluster Computing

Abstract

Software defined Radio (SDR) has been widely accepted in the last few years. Up to now, most SDRs have been implemented based on DSP and FPGA, which has the advantage of low-cost, low power-consumption and compact size. But with the fast development of general-purpose computer and network communication technology, it becomes possible to implement SDR based on general-purpose PC and LAN. This paper gives a detailed introduction on how to implement a SDR receiver based on cluster computing. The cluster consists of a dozen of blade servers and several common servers, which are interconnected by gigabit ethernet. The software components of the SDR receiver, including analog signal sampling, data dispatching, load balance, demodulation, channel decoding, source decoding and user interface are presented in detail. Depending on the several key technologys such as parallel network data dispatching, efficient load balance and two-level parallel computing, the receiver can get a throughput up to 200 MB/s and process wireless signals with bandwidth up to 40 MHz in real time. Furthermore, the receiver can process multiple channel signals with different frequency, bandwidth, modulation type, channel coding and source coding at the same time. By using a special RF front-end and a commercial high speed A/D convertor, the receiver can receive different frequency RF signal and digitize at 70 MHz IF. Up to now, the receiver can demodulate AM, FM, PSK, QPSK, 8 PSK, 16 PSK, mQAM signals and decode various channel and source coding widely used.