Abstract

Developing Field Programmable Gate Array (FPGA)-based applications is typically a slow and multi-skilled task. Research in tools to support application development has gradually reached a higher level. This paper describes an approach which aims to further raise the level at which an application developer works in developing FPGA-based implementations of image and video processing applications. The starting concept is a system of streamed soft coprocessors. We present a set of soft coprocessors which implement some of the key abstractions of Image Algebra. Our soft coprocessors are designed for easy chaining, and allow users to describe their application as a dataflow graph. A prototype implementation of a development environment, called SCoPeS, is presented. An application can be modified even during execution without requiring re-synthesis. The paper concludes with performance and resource utilization results for different implementations of a sample algorithm. We conclude that the soft coprocessor approach has the potential to deliver better performance than the soft processor approach, and can improve programmability over dedicated HDL cores for domain-specific applications while achieving competitive real time performance and utilization.

Highlights

  • Image processing algorithms are used in many applications, including image classification, medical image processing, video surveillance and target detection and tracking [1–3].These applications have been embedded in more and more devices such as smartphones, unmanned autonomous vehicles and surveillance cameras [4–6]

  • We propose the concept of customizable Soft Coprocessors (SCPs) as the basic building block for stream-based applications

  • Wecan developed our 8-bit own greyscale internal library reusable can be connected to the Zedboard is equipped with an Field Programmable Gate Array (FPGA), macros and reserved variables which we used to simplify and standardize the High-level Synthesis (HLS) coding which logic are (PL) andavailable an ARMtoprocessor

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Summary

Introduction

Image processing algorithms are used in many applications, including image classification, medical image processing, video surveillance and target detection and tracking [1–3]. Since the result of the HLS tools above is still HDL, users typically require the usual long re-synthesis time when they make changes to the algorithm or application [14]. This hinders the experimental nature of image processing application development, which is one of the targets of this paper. We provide a set of efficient hardware skeletons for defining new IA-like operations, where users need only supply their own C-based pixel-level function This enables the creation of very efficient function-specific SCPs

Imaging 2022, 8, 42
Current Tools for Designing FPGA Custom Cores in a High-Level Environment
Soft Processors
Image Algebra and Pixel Level Abstractions
FPGA-Based Image Processing
Summary
Qualitative
The Concept of Soft Coprocessors
Soft Coprocessors for Stream-Based Image Processing
Single Image Algebra-Based SCPs
Chaining Multiple SCPs in a Data Flow Graph
Skeleton SCPs for Function-Specific Coprocessors
Figure
Using the SCoPeS Development Environment
Architectures and Implementations of Coprocessors
Communication between Coprocessors
Coding
Evaluation
Evaluation and Comparisons
Conclusions
Full Text
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