A smart capless voltage regulator for very high bandwidth A/D and D/A converters in a standard 28nm CMOS process

Abstract

Analog systems, where good and stable supply plays an important role in total system performance, need highly accurate, clean and reliable low dropout linear regulators (LDOs). High performance and low area are also important in voltage reference circuits for achieving smallest cost and best in the industry Analog-to-Digital (A/D) and Digital-to-Analog (D/A) conversion. This paper describes a smart capless LDO that is designed to be used with very high bandwidth ADCs and DACs in a standard CMOS process. The maximum current, the LDO is able to provide is upwards of 200 mA, while the output voltage range can be programmed from 0.85 V to 1.05V. The intelligence of the LDO allows it to adjust its quiescent current totally based on the load current and can be as small as 80 µA with no load. Furthermore, the LDO can achieve an efficiency of 85% when used in normal conditions.