A Small Close-Coupled Fast Shared Data Pool for Multi-Core DSPs

Abstract

Improving the performance of Multi-Core Digital Signal Processors(MC-DSPs) for embedded applications needs the support of higher memory bandwidth and more flexible memory structures.This paper proposes a new shared Scratch-Pad Memory(SPM) structure for MC-DSPs,Fast Shared Data Pool(FSDP).FSDP is on the same hierarchy with L1 cache and can be directly accessed by LOAD/STORE instructions.FSDP is organized as parallel multi-bank structures with an interleaving access strategy and auto synchronous scheme based on hard signal-lamps.It supports high-speed parallel access and fast data words exchange.FSDP is a close-coupled share memory structure and it takes only four cycles to transmit a word between any two cores.The authors build the behavior simulator of FSDP and make its RTL implementation.The simulation with several typical benchmarks shows that FSDP is well suited to transmitting the fine-grain shared data in MC-DSPs.It achieves computation speedup ratio of 1.1 and 1.14 compared with traditional shared L2 caches and DMA units.