Abstract
Nowadays, XML is playing an extremely important role in various fields such as web services and database systems. However, the task of XML parsing is generally known as bottleneck in related applications since it takes a general processor dozens of cycles to process every single character of XML file. As a result, software XML parsing is of poor performance and hardware accelerator is an appropriate alternative to perform efficient XML parsing. Until now, some hardware XML parsers with good performance have come to the world. In order to further improve XML parsing performance, we propose a slide-window-based XML parsing accelerator (SWXPA) which introduces data-level parallelism and implement our design on a Xilinx Virtex-6 board at an average throughput of 0.33 cycle per byte (CPB) and 3.0 Gbps.
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