Abstract

Using device simulations, we investigate the change of the temperature behavior of Cu(In,Ga)(Se,S)2 solar cells. Our goal is to understand the behavior of the performance ratio (PR), normalized energy yield (Y), and the temperature coefficient of the open-circuit voltage as a contribution to the PR and Y. Therefore, we simulate temperature-dependent current–voltage (IVT) curves and apply weather data of a hot climate location to calculate PR and Y. For differently widened absorber band gap profiles, we observe an increase of the open circuit voltage leading to an enhancement of the relative temperature coefficient of the open circuit voltage and of the PR. In addition to that, we investigate the impact of three different barrier locations within the solar cell: at the back contact (a), at the hetero-interface buffer/absorber (b) and a conduction band barrier in the absorber space charge region (c). For all barrier locations, the PR improves with increasing barrier height. For (a) and (b), this improvement is accompanied by a power reduction at standard test conditions (STC) due to a fill factor reduction. In case (c), a small barrier improves STC power and the PR simultaneously. However, increasing barrier height beyond an optimum again leads to a decrease in STC power.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call