Abstract
A silicon-on-insulator (SoI)-like bulk silicon (SLBS) MOSFET structure is studied and compared against a fully depleted (FD) SoI MOSFET using 2-D numerical simulations. A p/n - /p + structure was contained in SLBS device, in which n - is made of 4H-SiC. This n - layer is FD. Hot carrier (HC) effects (HCEs) in proposed SLBS nMOSFET were simulated and compared with that in FD SoI nMOSFET. In this paper, HC-induced device degradation is characterized under different temperatures. HCE of SLBS always has an advantage over that of SoI. The worst case bias condition for HCEs has also been studied and was found as V gs = 1/2V ds .
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