Abstract

A simple scheme for slot reuse without latency for the dual bus configuration is studied. The scheme relies on information read in the previous slot and will be referred to as previous slot information (PSI) slot reuse. The scheme requires a minimal addition to the station hardware and its reliability is high. The efficiency of PSI is checked over a wide range of parameters and is found to be almost as good as destination release. The scheme can be implemented with or without the addition of erasure nodes. >

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.