A Simple Method to Grow Thermal <inline-formula> <tex-math notation="TeX">${\rm SiO}_{2}$ </tex-math></inline-formula> Interlayer for High-Performance SPC Poly-Si TFTs Using <inline-formula> <tex-math notation="TeX">${\rm Al}_{2}{\rm O}_{3}$ </tex-math></inline-formula> Gate Dielectric

Abstract

A simple method is proposed to grow thermal SiO2 interlayer when performing solid-phase-crystallized (SPC) process. By employing such interlayer between SPC polycrystalline silicon channel and Al2O3 gate dielectric, highperformance SPC thin-film transistors (TFTs) with field effect mobility of 67.80 cm2V s-1 and ON/OFF ratio of 2.31 × 108 at Vds = -0.1 V are achieved due to the superior interface quality and improved grain boundaries by the incorporation of excess Si interstitials. The TFT with interlayer also exhibits good reliability under negative bias temperature stress test.