Abstract
This research paper reports on a floating memristor model with minimum metal–oxide–semiconductor field-effect transistor count. The proposed structure uses only three nMOS transistors with a constant current bias and a single external capacitor. It offers less design complexity as compared to other existing memristor designs. The heart of the proposed design incorporates a MOS-based feedback circuit as an electronically controlled element for the memristance value. The memristor model has been integrated with 0.18- $\mu \text{m}$ Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) CMOS parameter. The pinched hysteresis loop of memristor for different frequency ranges and their composite characteristics are well analyzed using PSPICE simulation. The operating frequency range of the reported memristor is suitable up to few megahertz range. In addition to that application of the proposed MOS-memristor model is well described that comprises a Op-Amp-based Schmitt trigger circuit, a high-frequency modulation scheme, and an associative learning process. Finally, the postlayout simulation and experimental results are presented to validate the workability of the proposed memristor model.
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