A simple average current control with time‐length equality for primary‐side regulation flyback converter with constant output current control

Abstract

SummaryPrimary‐side regulation (PSR) flyback converter is widely used in small power applications. To increase the output power, continuous conduction modulation mode is always introduced. In this paper, a simple average current control method with very low cost is proposed for constant current controlled PSR flyback converter in both continuous conduction modulation mode and discontinuous conduction modulation mode. The average current control method is realized with time‐length equality by simply comparing the average current with switch current, such that analog‐to‐digital converter for current sampling in traditional average current control method is removed. In addition, to eliminate the subharmonic oscillation and keep low cost, a fixed switch‐off time control with time‐length compensation algorithm is used. To improve the output current accuracy, a hysteretic multimode control method is applied. The total control requires very low implementation costs that only contain a low‐speed Digital to analog converter (DAC), three comparators, and a digital controller. The performance of the proposed control method is experimentally verified on an Field‐progrannable gate array (FPGA) controlled 3.8 to 16 V/3.8 A PSR flyback converter. In experiments, stable control and high output current accuracy are obtained, and the output current accuracy is within ±1.8% under universe line voltage and output load.