Abstract
A single instruction multiple data (SIMD) Video Signal Processor (VSP) is presented in this paper. To provide flexible and efficient data organization, a separate control/data-preparing pipeline and global switch register file with write- transposer and read-permuter is designed. Since data preparation is offloaded from computing core, this VSP promises sustained performance close to its peak computational rates of 64-bit SIMD ALU/MAC datapath. The benchmarking shows that the proposed VSP forms a highly efficient solution to emerging H.264/AVC video decoder.
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