A Silicon-Based Low-Power Broadband Transimpedance Amplifier

Abstract

The analysis, design, and implementation of a 50-Gb/s transimpedance amplifier (TIA) in a 0.13- $\mu \text{m}$ SiGe BiCMOS process are presented. The proposed TIA, designed for use in a single-channel optical communication network, is comprised of three stages including: 1) a shunt-peaked, shunt-series feedback stage incorporating a transformer-based positive feedback; 2) an $RC$ -degenerated common-emitter stage; and 3) an inductively degenerated emitter follower. The TIA chip integrates an on-chip 100-fF input capacitor to emulate the photo-detector junction capacitor, and achieves a measured transimpedance gain of 41 dB $\Omega $ and an input-referred current-noise spectral density of 39.8 pA/ $\sqrt {Hz}$ over a 50-GHz bandwidth. The TIA achieves an open eye at 50 Gbps with random jitter of 2.3-ps rms (including the jitter contribution of the test fixture). The prototype chip occupies 0.58 mm2 (including pads) of die area and dissipates 24 mW of dc power from a 2-V supply voltage (i.e., less than 0.5 pJ/bit).