A shield-based three-port de-embedding method for microwave on-wafer characterization of deep-submicrometer silicon MOSFETs

Abstract

A general three-port S-parameter de-embedding method using shield-based test structures for microwave on-wafer characterization is presented in this paper. This method does not require any physical equivalent-circuit assumption for the surrounding parasitics of a device-under-test. We use one open and three thru dummy devices to remove the parasitic components connected to the gate, drain, and source terminals of a MOSFET. By shielding the lossy silicon substrate, the cross-coupling from port to port can be significantly mitigated, and thus, the parasitics of probe pads and interconnects at each port can be separately subtracted. The MOS transistor and its corresponding dummy structures fabricated in a 0.18-/spl mu/m CMOS process were characterized up to 20 GHz. Compared with the two-port cascade-based de-embedding method, the proposed three-port de-embedding procedure can further eliminate the parasitics associated with the dangling leg in the source terminal. The impacts of the accuracy of the de-embedding technique on device modeling and simulation are also discussed.