A Service-Oriented Component-Based Framework for Dynamic Reconfiguration Modeling Targeting SystemC/TLM

Youcef Khelfaoui,Khaled Allem,El-Bay Bourennane

doi:10.1155/2021/5584391

Abstract

To deal with the complex design issues of Dynamically Reconfigurable Systems-on-Chip (DRSoCs), it is extremely relevant to raise the abstraction level in which models are expressed. A high abstraction level allows great flexibility and reusability while bypassing low-level implementation details. In this context, model-driven engineering (MDE) provides support to build and transform precise and structured models for a particular purpose at different levels of abstraction. Indeed, high-level models are successively refined to low-level models until reaching the executable ones. Thus, this paper presents an MDE-based framework for DRSoCs design enabling the transformation of UML/MARTE specifications to SystemC/TLM implementation. To achieve a high degree of expressiveness for modeling dynamic reconfiguration, we use a suitable software engineering approach based on service-oriented component architecture. Since MARTE does not cover the common features of dynamic reconfiguration domain and service orientation concepts, new stereotypes are created by refinement to add missing capabilities to the profile. Likewise, SystemC does not provide native support for dynamic reconfiguration, thus leading us to adopt a design pattern based solution for DRSoCs implementation in compliance with standards. The proposed framework is validated through a reconfigurable active 3-way crossover case study in which we demonstrate the practicability of the approach by gradual model transformations with reduced implementation effort and significant design productivity gain.

Highlights

Raising the abstraction level in order to overcome the explosive complexity and competitive pressures of Systemson-Chip (SoCs) especially those qualified as dynamically reconfigurable is highly recommended by designers
To cope with the lack of partial and dynamic reconfigurable FPGA modeling tools at Electronic system-level methodologies (ESL), we propose a modeling and analysis of real-time embedded systems (MARTE)-based service-oriented component modeling framework targeting the automatic generation of SystemC code at transaction level
To tailor the MARTE profile for covering dynamic partial reconfiguration (DPR), service-oriented component models (SOCMs), and SystemC/transaction-level modeling (TLM) domain concepts, we propose to extend it with specific constructs, stereotypes, and tagged values referenced in two profiles: MARTE for DPR (MARTE4DPR) and MARTE for SystemC/TLM (MARTE4SCTLM)

Summary

Introduction

Raising the abstraction level in order to overcome the explosive complexity and competitive pressures of Systemson-Chip (SoCs) especially those qualified as dynamically reconfigurable is highly recommended by designers. Electronic system-level methodologies (ESL) enable the use of appropriate abstractions to achieve as quickly as possible simulation models in order to avoid time-consuming lowlevel simulations. To address challenges of ESL tasks, transaction-level modeling (TLM) has emerged as an efficient methodology with an acceptable simulation speed and modeling accuracy compared to register transfer level (RTL). Of all system-level description languages, SystemC [2] seems to be the most appropriate to meet the TLM requirements. SystemC-based transaction-level modeling involves communication between SystemC processes using function calls, while respecting the principle of separating communication from computation. By replacing all pinlevel events with a single function call, it is possible to reach speedup factors up to 10.000 x [3]

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