A Series-Connected-Load Doherty Power Amplifier With Push–Pull Main and Auxiliary Amplifiers for Base Station Applications

Abstract

This article proposes a new approach for designing high-power Doherty power amplifiers (DPAs) with extended bandwidth. The analysis starts with a generic series-connected load (SCL) DPA architecture to derive equations that relate the $ABCD$ parameters of the output combiner to the transistors’ optimum and load impedances. These equations make it possible to significantly increase the load impedance in the SCL DPA compared to the more popular parallel-connected load (PCL) DPA architecture—a feature of particular importance when targeting very high output power DPAs for macrocell base stations and broadcast applications. High-power PCL DPAs require very low load impedance, seriously complicating their design and limiting the achievable bandwidth of the DPA. To further maximize the load impedance increase, the proposed SCL DPA uses a push–pull topology for the main and peaking amplifier stages. A low-loss planar balanced-to-unbalanced transformer (balun)-based combiner network is then utilized to realize the DPA series-connected combiner while absorbing the transistor’s parasitics. The proposed approach is applied to design a proof-of-concept 350-W SCL DPA operating over the band spanning from 720 to 980 MHz. The prototype demonstrated a peak output power of about 55 dBm over a 30% fractional bandwidth with a 6-dB back-off efficiency, measured using a pulsed signal, of between 46.6% and 54.6%. Furthermore, the modulated signal-based measurement results confirmed the linearizability of the SCL DPA prototype, while it maintained a back-off efficiency over 50% for a signal with 7.1-dB peak-to-average power ratio.