A Sense Amplifier Based Modified Low Voltage Two Stage Flip-Flop with CNTFETs

Abstract

The transformation from the event of enabling technology to the assembly of consumer-centric semiconductor products has empowered the designers to consider characteristics like robustness, compactness, efficiency, and scalability of the merchandise as implicit precursors. The Carbon Nanotube Field Effect Transistors (CNTFETs) are nowadays popular emerging technology. The paper proposes the sense amplifier-based two-stage flip-flop working within the sub-threshold region. the primary stage produces full swing conditional inputs for the latch stage. The proposed circuit has been designed using 16 CNTFETs. This circuit contains a significantly low clock load which reduces the power consumption. An improvement in the propagation delay and power delay product has also been achieved. Comparisons with other flip-flop designs manifest the robustness of the proposed circuit. The HSPICE software is used for simulating and verifying the theoretical results.