A Self-Aligned Silicide Process for Thin Silicon-on-Insulator MOSFETs and Bulk MOSFETs with Shallow Junctions

Abstract

AbstractWe discuss a modified self-aligned silicide (salicide) process that uses a silicon cap to reduce the substrate silicon consumption by 50% as compared with a conventional salicide process. We have used a metal-silicon mixture to form the metal-rich phase reliably in the first anneal. After etching the unreacted mixture we deposit a silicon cap. This forces the metal to react with the silicon cap as well as with the substrate during the second anneal, thus minimizing silicon consumption from the substrate. The unreacted portion of the silicon cap is selectively etched, leaving a structure with a raised source and drain. We expect this process to be useful for forming silicide on shallow junctions and thin SOI films, where silicon consumption is constrained.