A self-aligned gate superlattice (Al,GA)As/n+-GaAs MODFET 5 × 5-bit parallel multiplier

Abstract

A 5 × 5-bit parallel multiplier circuit has been demonstrated with self-aligned gate superlattice (Al,Ga)As/n+-GaAs modulation-doped FET's (MODFET's). Multiplication times (gate delays) and corresponding power dissipations of 1.80 ns (73 ps/gate) at 0.43 mW/gate and 1.08 ns (43 ps/gate) at 0.75 mW/gate were measured at room temperature and 77 K, respectively. These are the shortest gate propagation delays ever reported for parallel multiplier circuits at room temperature or 77 K using any semiconductor IC technology.