Abstract
A novel low-complexity scalable architecture for dual basis multiplications over GF(2m) is proposed in this paper. This multiplier architecture is derived from the Hankel matrix-vector representation of dual basis multiplication, and is feasible for the finite fields generated by irreducible trinomials. By appropriately selecting its digit size, the proposed scalable architecture can achieve a satisfactory trade-off between hardware complexity and throughput performance for implementing ECC cryptosystems such as ECDSA in resource-constrained environments such as embedded systems and smart cards. Analytical results exhibit that the space complexity of the proposed multiplier architecture is substantially lower than that of the non-scalable architectures. Besides, owing to its features of regularity, modularity and concurrency, the proposed architecture is highly feasible for VLSI implementations.
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