A robust phase-locked loop against fundamental frequency deviations and harmonic distortions

Abstract

This paper proposes a frequency-adaptable method for computing the phase associated with the positive sequence components from the measured grid voltages. It relies on a simple procedure in which the positive sequence is separated from the negative one through a suitable decomposition of the synchronous voltage vector onto the stationary αβ frame. The procedure performance is enhanced by means of an one-cycle Fourier filter. The positive sequence voltages are then handled by a synchronous-reference frame phase-locked loop (SRF-PLL) algorithm. The structure composed of the positive-sequence estimator and the SRF-PLL is called a one cycle Fourier PLL (OCF-PLL). The OCF-PLL is robust against voltage harmonic distortions due to the OCF frequency-response characteristic. The frequency adaptability is obtained through the series connection of two OCF-PLL blocks. In the first block the fundamental frequency is computed by the SRF-PLL. This frequency is supplied to the second OCF-PLL block which computes the positive phase of the original measured voltages. Also, in this paper, the frequency adaptability is mathematically demonstrated. The method is initially evaluated by means of simulated voltages. Then, an experimental setup has been designed, in which the proposed method has been implemented in a digital signal processor (DSP) and tested on voltages produced by a programmable power supply able to emulate distorted and unbalanced voltages. The results prove the technique efficacy.