Abstract
This paper provides a contribution to the formal verification of programs written in the concurrent functional programming language Erlang, which is designed for telecommunication applications. It presents a formal description of this language in Rewriting Logic, a unified semantic framework for concurrency which is semantically founded on conditional term rewriting modulo equational theories. The formalization is tailored to the SLC Specification Language Compiler Generator, which is being developed at Aachen University of Technology as part of the Truth verification platform. SLC can be used to automatically translate the Erlang description into a verification tool frontend, i.e., a parser and a semantic evaluator which, given an Erlang program, compute the associated transition system.
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