A Review on Reduced Switch Count Multilevel Inverter Topologies

Prabhu Omer,Balwinder Singh Surjan,Jagdish Kumar

doi:10.1109/access.2020.2969551

Prabhu Omer, Balwinder Singh Surjan + Show 1 more

Open Access

https://doi.org/10.1109/access.2020.2969551

Copy DOI

Journal: IEEE Access	Publication Date: Jan 1, 2020
Citations: 168	License type: CC BY 4.0

Affiliation: Punjab Engineering College

Abstract

Multilevel Inverters (MLIs) are becoming more and more popular in medium and high power applications. This is due to several inherent advantages of MLI over two-level inverters such as high-quality output, lower device ratings, and several others. While the classical topologies are still having applications in most of the key areas, there is a growing interest in newer multilevel topologies with an objective of reducing power semiconductor device count, gate drivers and/or isolated DC sources. In this paper, a comprehensive review of some of the recently proposed newer multilevel inverter topologies with the abovementioned objectives is presented. In this article, a detailed investigation in terms of total power semiconductor switch count, number of DC sources, passive component requirement, highest switch voltage rating, total standing voltage etc. has been presented.

Highlights

DC-AC power conversion has become a key technology in the areas of generation, transmission, distribution and utilization of electric energy
This paper aims to present a review of such topologies with exclusive purpose of reducing the power switch count and DC sources requirement
The good feature with these multilevel inverters (MLIs) is that they have reduced their active DC source count with the induction of capacitors but problem associated is that either they require additional capacitor voltage balancing circuit or another control loop for capacitor balancing or have to be switched at high frequency to minimize capacitor voltage ripple

Summary

Introduction

DC-AC power conversion has become a key technology in the areas of generation, transmission, distribution and utilization of electric energy. The major problem associated with two level square wave and PWM inverters is that for medium and high power level system, they require devices of high power rating which is many times not available and to serve the purpose many devices need to be connected in series/parallel strings to obtain the required voltage/current capacity. Another problem with these inverters is the poor power quality output and filtering requirements before the load.

Objectives

Discussion

Conclusion