A Review of Noise Reduction Techniques in Noise-shaping SAR ADCs

Abstract

Noise-shaping successive-approximation-register (NS-SAR) ADCs have become one of the most promising candidates for high-resolution data converters over the past decade. This is due to the fact that they combine the advantages of delta-sigma modulation and SAR ADCs. In this hybrid architecture, the quantizer and residue feedback DAC can be replaced by SAR, a replacement which achieves high SNR while also benefiting from superior power efficiency and low cost. For NS-SAR ADCs, various implementations of loop filters for residue processing exist that can realize the noise transfer function (NTF) for NS effects. In addition, many noise reduction techniques have been proposed that suppress additional noises not shaped by NTF. This paper describes the basics of NS-SAR ADCs while also reviewing noise reduction techniques, which include the implementation of a loop filter for residue handling, kT/C noise rejection, and capacitive DAC mismatch error shaping. It also outlines advanced architectures that can overcome the limitations of NS-SAR ADCs.