Abstract
Multilevel cell (MLC) phase change memory (PCM) offers many potential advantages in scalability, bit-alterability, non-volatility, and high program speed. While many program approaches had been proposed, they were usually evaluated in energy, delay, or energy-delay product (EDP). These metrics, however, often overlook the data integrity maintenance (DIM) overhead caused by the resistance drift (R-drift) phenomenon in the MLC PCM. This letter proposes a program-maintenance (PM) metric, which is a modified EDP metric with DIM consideration. Furthermore, we evaluated the PM metric of various pulse shapes in iterative program–verify scheme. From the measured data of a 128M-cell MLC PCM chip, we showed that the PM metric of optimized pulse shape is better than those of the conventional SET and RESET pulse shapes up to 86.7%.
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