A Recursion and Lock Free GPU-Based Logic Rewriting Framework Exploiting Both Intranode and Internode Parallelism

Abstract

Logic rewriting is an effective but time-consuming technique to optimize the multi-level logic network by rewriting sub-networks of the input network with other logic equivalent structures. However, contemporary multi-thread rewriting algorithms either fail to parallelize the sub-procedures of rewriting for individual nodes (intra-node parallelism) or require locks to ensure the mutual exclusive among the scheduled nodes that are rewritten concurrently (inter-node parallelism), hence inevitably decreasing the degrees of parallelism and the scalability. This paper proposes a novel GPU-based logic rewriting acceleration framework to address the mentioned issues in two phases. First, to exploit the intra-node parallelism, we propose recursion-free algorithms that parallelize sub-procedures of rewriting, which was hard to achieve due to the highly recursive nature of original rewriting algorithms. Second, to exploit the inter-node parallelism, we propose a work scheduler that can schedule mutually exclusive nodes and a GPU-friendly data structure that can support efficient concurrent operations. The new work scheduler and data structure allow simultaneously processing plenty of nodes without using locks. Experimental results show that our method can achieve on average 3.81× speedup, compared to the state-of-the-art GPU-parallel method with the same quality of results.