Abstract

This paper presents a new Recurrent Dynamic Neural Network (RDNN) approach and its implementation in order to solve noisy signal representation, processing, and compression. Essentially, the neural net solves, in a systematic recurrent way, simultaneous sets of uncertain and even noise corrupted linear or nonlinear equations, by seeking a corresponding minimum energy state. The VLSIC hardware design and implementation are built around asymmetric Cellular Neural Network (CNN) architecture. Digital semi-custom circuit design is used to implement each CNN building block, using CMOS 2-/spl mu/m n-well technology, and employing available standard cell library. The overall dimensions of the implemented CNN is 3.1/spl times/2.5 mm/sup 2/. Time domain simulation using IRSIM, gave an expected throughput rate of 33 M operations per second. The perceived advantages over traditional approaches are: robustness of computation, ability to confront dynamic (time-varying), as well as noisy signals, flexibility in implementation, and quick turn-around design time.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call