Abstract

The trend of space technology developments is moving from high power consuming, bulky and costly systems towards low-power, small, low-cost and flexible systems. Thus, the spacecraft can benefit from multi-purpose and flexible systems which can be low-power and low-cost by employing new technology. One example of such system is a GNSS receiver capable of adapting the number of used frequency bands depending on its power constraint and the required accuracy. In the past, a Global Navigation Satellite System (GNSS) receiver has primarily been used for navigation purposes. However, as the number of available GNSS systems has increased, the potential of introducing new applications using these systems has also increased. Such applications become more robust and their performance can be improved if the GNSS receiver can operate with more than one GNSS system. On the other hand, extensive research and developments in state-of-the-art integrated circuit (IC) technology facilitates the integration of complex systems in a very compact and efficient manner. This miniaturization can be spun into space applications which are very complex systems by itself. Using this potential leads to new approaches in spacecraft design as well as potentially new space applications which may require short time-to-market. The research objective of this thesis is to develop a space-capable, flexible, multipurpose, low-power and low-cost GNSS receiver front-end. This front-end shall be able to process GNSS signals from different GNSS systems and different frequency bands. In chapter 1, an overview of navigation systems along with applications of GNSS systems is presented. This chapter also provides and introduction to state-of-the art IC technology and its advantages and disadvantages for using it in space. Thesis objectives and research questions conclude this chapter. Chapter 2 covers the fundamentals of satellite positioning system and provides a detailed explanation of GPS and Galileo signal structures followed by investigating a generic GNSS receiver architecture. This chapter is concluded with explanation of requirements for designing a space capable GNSS receiver. In chapter 3, existing radio receiver front-end architectures are reviewed and compared. The most suitable architecture, i.e. zero-IF, is selected. Finally, an innovative and flexible architecture for GNSS receiver front-end based on zero-IF is proposed. Chapter 4 begins with technology selection and calculations of link budget of the proposed receiver front-end. It is followed by reviewing various implementations of building blocks of the front-end and their comparison. In this chapter an innovative mixer architecture for zero-IF architecture is proposed which overcomes its two main problems, the DC offset and flicker noise. The chapter concludes by selecting the most suitable circuits for mixer, quadrature oscillator and analog to digital converter (ADC) for this receiver front-end. In chapter 5, the circuits of the mixer, quadrature oscillator, amplifier and ADC are developed in transistor level followed by verification simulations. The results of the simulations verify the expected behavior of the proposed mixer as well as the quadrature oscillator, amplifier and ADC. The thesis is concluded in chapter 6 with summary of the results, recommendations and future outlook.

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