Abstract
Huge numbers of advanced electrical engineering applications employ infinite impulse response (IIR) filters very frequently in order to meet market’s demands. Especially, some applications such as video processing, digital signal processing and high-speed digital communication necessitate computational efficiency and low latency. In this point of view, high-speed processing of digital data require a digital signal processor or an FPGA instead of a conventional microprocessor. In this respect, in the last decades, FPGAs are commonly used in order to bring new opportunities to the designers. This work gives a FPGA hardware design of a 4th order IIR reconfigurable filter structure. The proposed filter’s maximum clock frequency is around 32MHz which covers different low frequency applications from biomedical signal processing up to speech applications. To verify the performance of the filter, 4th order Butterworth and Chebyshev filters are realized in the basis of Matlab results and FPGA behavioral model. Also, consuming logic gates and blocks are given in order to evaluate chip area occupation. It should be considered that the proposed filter scheme presents promising results to meet low frequency applications.
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