Abstract

A programmable and scalable parallel architecture is proposed for the real-time encoding/decoding of HDTV images and for nonlinear editing of the compressed video data. It only uses the intra-mode compression/decompression so that nonlinear editing can be performed easily and high-quality images can be recovered. Spatially partitioned image data are concurrently processed by multiple parallel processing units (PUs). Each PU consists of a programmable parallel digital signal processor, called multimedia video processor (MVP; TMS320C80), and reconfigurable field programmable logic devices (FPLDs). The performance of the REDS is described in terms of the required MVP cycles for transform coding and the FPLDs throughput for entropy coding. Robust rate distortion-optimized quantization matrices for HDTV images are presented.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.